Generic vs. specific stackups for PCB designers

I have a question targeted at the design and signal integrity engineersâ??perspective, not PCB fabri......

PCB Impedance Loss Insertion Loss Routing Dielectric Stackup Fabric Signal Integrity Power Integrity

asked by jeff.loyer lastest answer by buenoshun

4 years 8 months 16 days

0

votes

2

answers

3815 views

Follow Up on Transmission Line Tool

Hi,I recently posted a link to a free transmission line calculator I developeda while ago and I got ......

PCB Transmission Line Current Stackup SI-LIST

asked by tim

4 years 9 months 9 days

0

votes

0

answers

2289 views

Free Transmission Line Calculator

Hi,I've recently returned to consluting work and have the opportunity torelease some tools I develop......

PCB Impedance Transmission Line Loss Microstrip Stackup Standard

asked by tim lastest answer by michael.huang

4 years 10 months 27 days

0

votes

4

answers

3108 views

Controlled impedance substrate design

Hello All SI expertsi'm designing 2 layer chip substrate ( not board) that should havedifferential 1......

Impedance Reference Reference Plane Stackup Substrate Solder Mask Full Wave

asked by qantrix

4 years 10 months 13 days

0

votes

0

answers

2075 views

tune Dk and Df to match simulation and measuremen......

Hi Experts,I have design a SI-test brd and do some measurements by VNA to obtain the Sparameters fro......

PCB Simulation Microstrip Stackup VNA HFSS measurement

asked by zhangjun5960 lastest answer by billh

5 years 22 days

0

votes

2

answers

2096 views

PDN resonance mode excited by high speed signal

Hi experts,I'm trying to simulate the phenomena of PDN resonance mode getting excited by the EM fiel......

PCB Via Ground Transient Resistor Stackup Spectrum Resonance Cadence

asked by sherman.chen lastest answer by istvan.novak

5 years 9 months

0

votes

2

answers

2294 views

Uncoupled differential signalling

On a recent design I tried out routing loosely coupled differential pairs.Previous tests I've have d......

Impedance Differential Impedance Transmission Line Noise Routing Stackup

asked by johan.lans lastest answer by johan.lans

5 years 9 months 23 days

0

votes

3

answers

2494 views

Senior SI Engineer Oppertunity

Hello all,Newisys(Sanmina) has an opening for a Senior SI engineer. Please contactMichael if intere......

PCB IBIS Transmission Line Simulation TDR PCI PCIE DDR Stackup VNA Standard Microwave Hspice Cadence HyperLynx Signal Integrity

asked by abbz100

5 years 11 months 9 days

0

votes

0

answers

2015 views

Webcast: How to Optimize Your SerDes Design Durin......

Hello,I'm giving a webcast next week entitled "How to Optimize Your SerDes Design During the Pre-lay......

Impedance SerDeS EMI Transmitter Receiver PCI Eye Stackup Equalization Signal Integrity Power Integrity

asked by colin_warwick

6 years 6 days

1

votes

0

answers

2155 views

Board design adjustments by manufacturers

Hello Everyone,After going through a multiple analysis to measurement validation projects, I realize......

Impedance Stackup Electromagnetic Signal Integrity measurement

asked by shlepnev lastest answer by shlepnev

6 years 15 days

0

votes

6

answers

1825 views

Has anyone Compiled a Loss-Budget List?

Hi All:I realize that serial-link budgets typically come from component-manufacturer design guides, ......

PCB Loss Stackup

asked by billh lastest answer by billh

6 years 22 days

0

votes

1

answers

1575 views

Stripline vs. Microstrip selection

Hi All: I have a few 4 inch 25Gbps channel on my board,the design requirementis the lowest tota......

Impedance Via Loss Microstrip Stripline Stackup

asked by liewluping lastest answer by Gert.Havermann

6 years 2 months 16 days

0

votes

4

answers

2685 views

Reference for DDR3 signals

Hi Guys,I'm currently doing DDR3 analysis. My board uses DIMM Modules and operates @ 1600Mbps. DIMM ......

Reference Current Ground Return Path Simulation DDR DDR3 DIMM Stackup

asked by razeen_rulez lastest answer by liewluping

6 years 4 months 18 days

0

votes

3

answers

2296 views

Radiation loss of microstrip

Hi, ExpertsI am investigating radiation loss of microstrip line for high speed digitalcircuit. Read ......

Loss Dielectric Microstrip Stackup HFSS

asked by phonondelta lastest answer by telegrapher9

6 years 5 months 2 days

0

votes

4

answers

2483 views

10L Stackup Selection for Better Impedance Contro......

Hi All: As Donald Telian and Sergio Camerlo's Paper on Designcon 2014 suggest,the pre-preg height ......

PCB Impedance Stackup

asked by liewluping

6 years 5 months 4 days

0

votes

0

answers

1643 views

Clarification on Trace Routing over Plane Splits

Hi all -I have previously spent time in the high-speed realm, routing PCIe,SATA, HT, and many other ......

PCB Impedance Noise Clock Capacitor Via Reference Reference Plane Current Return Current Ground EMI Routing Decoupling Decoupling Capacitor PCI PCIE Stackup Rise Time

asked by movax lastest answer by movax

6 years 6 months 1 day

0

votes

4

answers

2564 views

Nordic SI Week May 5-9 with Lee Ritchey

You and your colleagues are all invited to the Nordic SI Week May 5-9 inStockholm. We have three cou......

Simulation FPGA Stackup Signal Integrity

asked by ro

6 years 7 months 28 days

0

votes

0

answers

1714 views

GND vs Power as reference

(I've changed the "Subject" title a bit...)I think that if I was "dead wrong", no one in the entire ......

PCB Impedance Noise Clock Reference Ground Loss Insertion Loss Crosstalk Simulation Decoupling TDR Microstrip Stripline Stackup VNA Resonance Skew

asked by jeff.loyer lastest answer by shengli.lin.sl

6 years 11 months 25 days

0

votes

24

answers

2694 views

Fwd: GND vs Power as reference

Jeff Placing a signal on a power layer implies changing reference layers inmost every case, otherwis......

PCB Impedance Package Noise Clock Capacitor Via Reference Ground EMI Return Path Loss Insertion Loss connector antenna Crosstalk Simulation Decoupling TDR PCI PCIE Microstrip Stripline Stackup VNA Resonance Skew Ringing measurement

asked by scott

6 years 11 months 25 days

0

votes

0

answers

2387 views

Copper width that has DCR within target spec

Hi All,For Power Integrity Analysis, I've calculated target DCR using Maximum Peak current, Voltage ......

Voltage Stackup Power Integrity

asked by praveenkumardr lastest answer by yu.yanfeng

6 years 12 months 2 days

0

votes

11

answers

1931 views