A DIMM or dual in-line memory module comprises a series of dynamic random-access memory integrated circuits. These modules are mounted on a printed circuit board and designed for use in personal compu

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min trace length


Hi experts,As we know, there are two kinds of applications for DDR, one is SDRAM onboard, and anothe......

asked by chambers.yin lastest answer by chambers.yin

4 years 11 months 18 days

0

votes

4

answers
2668 views

Why are PCIe card edges beveled and DIMMs aren't?


Does anyone know why they bevel PCIe cards but don't bevel DIMMs? We're guessing that they want les......

asked by jeff.loyer lastest answer by Hermann.Ruckerbauer

5 years 8 months 6 days

0

votes

5

answers
3601 views

How to estimating signal waveforms at inaccessib......


Dear All: You may treat this question as a follow up discussion of recently hot discussion "t......

asked by luliu lastest answer by luliu

5 years 10 months 7 days

0

votes

5

answers
3022 views

Reference for DDR3 signals


Hi Guys,I'm currently doing DDR3 analysis. My board uses DIMM Modules and operates @ 1600Mbps. DIMM ......

asked by razeen_rulez lastest answer by liewluping

6 years 6 months 27 days

0

votes

3

answers
2399 views

External Influences on DRAM Refresh Rate?


Hi All,I'm curious if anyone has identified other factors that influence the refresh rate of DRAM (o......

asked by jpritchard lastest answer by Wolfgang.Maichen

6 years 8 months 9 days

0

votes

5

answers
2074 views

DDR3-1600 Double-Tee Topology


Hi Everyone,Has anyone tried using a double-tee topology with their address/command/control signals ......

asked by josephaday lastest answer by prashant.jaiswar

6 years 10 months 22 days

0

votes

19

answers
3514 views

DDR3 Ccomp capacitance delay


Hi Experts,SODIMM and controller specifications I read all say to match (in time) address/command ne......

asked by petebenjamin730 lastest answer by brahimkou

6 years 11 months 19 days

0

votes

5

answers
2675 views

15 ohm resistor in DDR3 DIMMs


Hi,Could anyone please specify the reason why DDR3 DIMMs use a 15 ohm resistor right after the conne......

asked by Sumant.Srikant lastest answer by weirsi

7 years 3 months 5 days

0

votes

3

answers
2642 views

DDR3 dynamic ODT


Hi,Please help recommend some documents on how the multirank DIMM's are accessed by the controller a......

asked by lijun_hit lastest answer by Hermann.Ruckerbauer

7 years 3 months 8 days

0

votes

1

answers
1785 views

Measurement point for DDR3


Hi experts,I am validating pre-silicon an embedded DDR3 interface with simulation. The system is an ......

asked by ted.clark lastest answer by yousufs432

7 years 3 months 10 days

0

votes

10

answers
2434 views
7 years 3 months 3 days

0

votes

0

answers
2295 views

Dynamic Phase offset time


Hi,In a registered DIMM, Dynamic Phase offset time of a PLL is taken intoaccount for Timing Budget C......

asked by kbmanick

7 years 5 months 21 days

0

votes

0

answers
1708 views

DDR2 length matching address and clock


Dear Experts,This is regarding the trace length matching between DDR2 address and clocksignals.*As p......

asked by kbmanick lastest answer by weirsi

7 years 6 months 18 days

0

votes

1

answers
1983 views

DDR3 Multi Rank Working ODT


Hi,I am working on DDR3 8 Rank (DIMM), for this i want to do termination onData signals using ODT op......

asked by shankar.electronics lastest answer by Hermann.Ruckerbauer

7 years 10 months 10 days

0

votes

2

answers
2129 views

Check LPDDR2 CK-DQS timing


Hi, I'm going through LPDDR2 spec for CK-DQS timing definition on DRAM side. The spec has define......

asked by zlqin80 lastest answer by Hermann.Ruckerbauer

8 years 2 months 24 days

0

votes

3

answers
2736 views

Vref_DQ Vref_CA VTT decoupling in DDR3 DIMM


Hi, expertsI read the standard "DDR3 SDRAM Unbuffered DIMM Design Specification"On the page 32, it s......

asked by emcesd lastest answer by weirsi

8 years 5 months 6 days

0

votes

26

answers
2730 views

DDR3 termination with only 2 memory devices


Hi Experts,I don't have access to simulation tools right now. If any of you have thoughts about a t......

asked by sgoedecke lastest answer by sgoedecke

8 years 10 months 26 days

0

votes

5

answers
2040 views

DDR3 CK/CK# termination


Hi, I was looking at the JEDEC spec for DDR3 DIMMs and saw that the termination for the CK/CK# is th......

asked by snehamay lastest answer by tom

8 years 11 months 12 days

0

votes

2

answers
1798 views

DIMM-connector frequency characterization info?


Do any of you know where I can find frequency characterization information for the connectors for DD......

asked by sgoedecke lastest answer by robert.myoung

9 years 9 days

0

votes

3

answers
1489 views

trace impedance difference in same signal group o......


Hello all,May I raise a question to all of you, as you know, Intel does more constraints restriction......

asked by harrison_cls lastest answer by heyfitch

10 years 7 months 21 days

0

votes

10

answers
1821 views
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