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Power Supply Noise injected Jitter impact on SERD......


Hi All,In my design I have high speed interfaces like DDR4 and PCIe 3.0 interfaceoperating at their ......

asked by rameshp3note lastest answer by carsona

4 years 9 months 2 days

0

votes

1

answers
2441 views

DDR4 and PAM4 DesignCon papers


Hi si-listers,I uploaded our DesignCon 2015 technical track papers to:http://signal-integrity.blogs.......

asked by colin_warwick

5 years 8 months 9 days

0

votes

0

answers
2841 views

free Keysight Technologies (formerly Agilent) Sig......


Not too late to register for a free Keysight Technologies seminar on some of the latest simulation t......

asked by heidi_barnes

6 years 1 month 13 days

0

votes

0

answers
1932 views

source of DDR 4 timing recommendations


Can anyone help me understand the source of the pcb routing recommendationsI see for DDR4. For inst......

asked by ericsilist lastest answer by Nitin_Bhagwath

6 years 2 months 23 days

0

votes

6

answers
2535 views
6 years 6 months 26 days

0

votes

0

answers
2090 views

DesignCon 2014 papers from Agilent available for ......


Hi si-listers,We've posted the DesignCon 2014 papers that we authored or co-authored. "Modeling, Ext......

asked by colin_warwick lastest answer by movax

6 years 7 months 23 days

0

votes

2

answers
2462 views

DDR4 Simulation in Hyperlynx


Hi All,Could some one clarify me on DDR4 simulation in Hyperlynx 8.2.1 :How the Data Mask for DDR4 ......

asked by shankar.electronics lastest answer by Arpad_Muranyi

6 years 9 months 2 days

0

votes

1

answers
2462 views

DDR4 Logic Level


Hi Experts,It seems that input logic level VIH(AC)&VIH(DC)&VIL(DC)&VIL(AC) are not given out in the ......

asked by icermail

6 years 10 months 29 days

0

votes

0

answers
1878 views

Announcement of On-line Course Event: Mastering t......


Content-Type: multipart/alternative; boundary="----=_NextPart_002_0048_01CEBAEB.269F5460"----......

asked by hanymhfahmy

7 years 2 days

0

votes

0

answers
1836 views
7 years 2 months 24 days

0

votes

0

answers
2228 views

DDR4 IBIS models


Hi,Does anyone have a source for DDR4 IBIS buffer models? I tried all the big name memory suppliers ......

asked by pcbguy lastest answer by anil.lingambudi

7 years 7 months 28 days

0

votes

1

answers
1865 views

DDR3/DDR4 footprint


Hello,I would like to understand can DDR3 part be swapped with DDR4 if it is pincompatible other tha......

asked by bhoumiks

7 years 7 months 4 days

0

votes

0

answers
1712 views

DDR 4 Features


Hello,as we have just touched DDR4 ..Some time ago I made a short overview DDR2 vs. DDR3. I did an u......

asked by Hermann.Ruckerbauer

8 years 24 days

0

votes

0

answers
1791 views
14 years 1 month 28 days

0

votes

0

answers
1580 views

Interfacing DDR 400 DRAM Chips to Xilinx Virtex I......


Hi Gurus, I need to interface DDR400 DRAM chips andDDR333 SO-DIMM Module to a Virtex II FPGA.......

asked by sivakumar_skm lastest answer by weirsp

17 years 1 month 6 days

0

votes

1

answers
1555 views
1
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