Gen 2 of double data rate synchronous dynamic random-access memory interface.

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Including submodel selection keyword in IBIS mode......


Hi SI users,We have been generating IBIS models for DDR2 memory and have always come across a proble......

asked by Brijesh.Shah lastest answer by Brijesh.Shah

5 years 3 months 23 days

0

votes

3

answers
2570 views

Point to point simulation results


Hi,I am trying to simulate a topology.it consists of driver --> 0 ohm resistor --> MS line (length v......

asked by malli.1729 lastest answer by sherman.chen

6 years 1 month 11 days

0

votes

3

answers
2238 views

SigNoise errors/warnings during simulation


We are trying to simulate a topology.Driver is MPC8349EHere are the Models available for DDR2. ddr2_......

asked by malli.1729 lastest answer by malli.1729

6 years 26 days

0

votes

2

answers
2129 views

DDR2 problem


Having some issues with a 225MHz DDR2 implementation at high temperature.I am wondering if the probl......

asked by bryan lastest answer by Hermann.Ruckerbauer

6 years 1 month

0

votes

3

answers
2237 views

DDR2 ODT configuration


Hi all, Recently,I was doing a SI simulation on 400MTS DDR2 signals,with 4 DIMMslots. I notice th......

asked by mazhuofan lastest answer by mike_bihan

15 years 3 months 6 days

0

votes

3

answers
1527 views

DDR2 design


Hi SI Experts,I am reviewing a layout for an embedded DDR2 design using 4 Micron DDR2 chips with an ......

asked by ivorlist lastest answer by Dhiraj.Kiran

14 years 9 months 24 days

0

votes

17

answers
1139 views

DDR Clock & Length Matching


Hi All, I'm working on a design based on PowerPC PPC440EPx with DDR2. The DDR2 bus consists of fou......

asked by kenny_frohlich lastest answer by wang.zhenfeng

13 years 10 months 2 days

0

votes

3

answers
1078 views

Would you follow the overshoot specs of the datas......


Hi all: This questions comes from yesterday's topic "DDR2 Trace Length Margin" which Jeff, Brian,......

asked by liuluping lastest answer by liuluping

12 years 4 months 9 days

0

votes

4

answers
1384 views

The necessity of Pull-up resistors in DDR2


Hello SI ExpertsI've conducted some pre-layout simulations on a DDR2 bus connected toon-board DDR2 d......

asked by ihirshtal lastest answer by ihirshtal

10 years 10 months 25 days

0

votes

11

answers
1557 views

trace impedance difference in same signal group o......


Hello all,May I raise a question to all of you, as you know, Intel does more constraints restriction......

asked by harrison_cls lastest answer by heyfitch

10 years 7 months 21 days

0

votes

10

answers
1821 views

DDR2 termination Questions


Some questions about DDR2 termination -Let's say it's a Read operation from Memory to FPGADDR2 ---> ......

asked by hitheshn lastest answer by liu.yaoping

8 years 7 months 17 days

0

votes

8

answers
1601 views

Where SSTL_15 (DDR3 1.5V SSTL standard) is availa......


Hi,I can able to find SSTL25,SSTL18 for corresponding DDR and DDR2.Where can i get SSTL_15 (DDR3 1.5......

asked by malli.1729 lastest answer by Hermann.Ruckerbauer

6 years 2 months 10 days

0

votes

2

answers
3840 views

cross talk threshold in DDR2


HiHow to calculate the cross talk threshold which has to be considered inDDR2 interface simulation? ......

asked by kbmanick lastest answer by wufengthu

7 years 2 months 10 days

0

votes

1

answers
1723 views

Anyone with DDR2 experience?


I have a project coming up and we are looking at DDR2. Anybody have any experience with this techno......

asked by patricko lastest answer by msharpes

18 years 6 months 29 days

0

votes

1

answers
1357 views

simulation tool frequency setup


Content-Type: Text/Plain; charset="big5"Content-Transfer-Encoding: quoted-printabledear experts;=0D......

asked by wendy118 lastest answer by Andrew.Ingraham

18 years 3 months 19 days

0

votes

1

answers
1299 views

help! hold time calculation of source synchronous......


Content-Type: text/plain; charset="big5"HI SI-list:I have met a trouble in memory read calcul......

asked by HouKevin lastest answer by HouKevin

18 years 1 month 6 days

0

votes

2

answers
1275 views

Re: DDR-II SDRAM (SSTL-18 class-II): AC-test load


Hello CKW,the DDR1 spec to my opinion was not very lucky with respect to =AC-testload:1) the Ron of ......

asked by mathias.borcke

17 years 3 months 9 days

0

votes

0

answers
1426 views

DDR2- 800MBPS timing requirements


Hi All,I'm doing some timing analysis on the DDR2 interface and am in need of someinformation.The JE......

asked by jellis

17 years 1 month 20 days

0

votes

0

answers
1372 views

Where can I get DDR2 EBD or design file?


Dear All:Is there anybody know where can I get DDR2 DIMM module EBD or design file? Ihave tried Sams......

asked by JackWCLin lastest answer by sghsu55

17 years 17 days

0

votes

2

answers
1147 views
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