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Connector characterization.-


Hi,I need to pass some digital (std. binary) differential signals through anunknown connector instal......

asked by sg-listas lastest answer by sg-listas

4 years 7 months 28 days

0

votes

8

answers
3142 views

How to specify via hole sizes


One thing that has bothered me forever is the ambiguity in specifying viahole sizes. To my mind, the......

asked by jeff.loyer lastest answer by buenoshun

4 years 11 months 27 days

0

votes

6

answers
4038 views

Creating S parameter model for simulation


Hello Experts,I would like to study the impact of different routing on mounted inductance for decoup......

asked by benoit.goral lastest answer by istvan.novak

4 years 11 months 19 days

0

votes

1

answers
2731 views

Wiring Harnessing SI Question


HI all --Hoping that list can shed some light on some wire harness related SIquestions at some very,......

asked by movax lastest answer by corley

5 years 1 day

0

votes

4

answers
3323 views

Looking for appropriate forum/mailing list for ES......


Dear Experts,I have been a long time follower of the mailing list and I have thoroughlyenjoyed readi......

asked by alfred1520list

5 years 1 month

0

votes

0

answers
2036 views

SODIMM connector model


Hi Folks,I'm looking for an SO-DIMM connector model. This is for an LPDDR4 application. I don't know......

asked by John.Ellis lastest answer by Hermann.Ruckerbauer

5 years 2 months 25 days

0

votes

1

answers
1748 views

edge connector layout optimization


I'm designing 6Gbps interconnect using edge connector.i try to optimize it's layout using this flow1......

asked by qantrix

5 years 3 months 10 days

0

votes

0

answers
1886 views

de-embedded [S] measurements and IEEE


So how many times have you gotten a measured Touchstone file from a vendor and felt the data was bad......

asked by jim.nadolny

5 years 4 months 1 day

0

votes

0

answers
2188 views

Phase or Frequency drift when hiting a cable


Cable convey 10Mhz from a ultrastable clock STALO to the PLL using lvds.PLL output is 1275Mhz and it......

asked by ivanperino

5 years 5 months 27 days

0

votes

0

answers
2013 views

[SI-LIST]: Differential Signal S Parameters


Hi All,I was extracting 4 port S parameters for differential signal on FR4 PCBtrace referenced to gr......

asked by ah.vinod lastest answer by ah.vinod

5 years 5 months 29 days

0

votes

4

answers
3157 views

Need Instrument Quality 2.92 mm PCB connectors


Hi Experts,I am constructing a measurement board, and would like to get instrument quality 2.92 mm P......

asked by ravinder.ajmani lastest answer by al

5 years 5 months

0

votes

1

answers
1920 views

EMI gasket for HDMI and USB connectors


Does anybody know know of an off the shelf EMI gasket to connect the shellof HDMI and USB connectors......

asked by joel

5 years 6 months 25 days

0

votes

0

answers
1937 views

some questions abou a PCB test coupon to measure ......


Hi experts,I have designed a PCB test coupon to measure the impedance curve andcrosstalk curve from ......

asked by zhangjun5960 lastest answer by istvan.novak

5 years 7 months 25 days

0

votes

3

answers
2833 views

Opening in Molex Singapore


Fellow SI engineers,I am looking to hire a senior person in my team in Singapore. Please see the det......

asked by dmarc-noreply

5 years 7 months 9 days

0

votes

0

answers
2158 views

HSTL single ended bus to FPGA EVB Connector


Can someone suggest on how to connect HSTL unidirectional signals to HPCconnector of FPGA EVBThe pro......

asked by moshef108

5 years 7 months 16 days

0

votes

0

answers
1858 views

Registration is Now Open for the 9th Central PA S......


Hello Dear Colleagues: Registration in now open for the 9th Central PA Signal Integrity Symposium, A......

asked by awm2

5 years 8 months 11 days

0

votes

0

answers
2428 views

characteristic impedance of the waveport


Hi friends,I have a question about port settig in HFSS. For the PTH vias onmotherboard for connector......

asked by zhangjun5960

5 years 9 months 27 days

0

votes

0

answers
2213 views

DVI compliance woes


I'm performing DVI compliance testing on a board with ptn3360d TMDS level shifters followed by WURTH......

asked by andrew lastest answer by tom

5 years 9 months 11 days

0

votes

1

answers
2407 views

Question about jitter at serdes transmitter


We are using an Altera Arria II GX FPGA for a SATA 3 6GBPS interface.I ran some simulations in Hspi......

asked by joel lastest answer by dmarc-noreply

5 years 9 months 17 days

0

votes

4

answers
2937 views

Flex-PCB IPC Class 3/A


??Hi,It might be off-topic, but some of you might have face this in the past.I need to design a FLEX......

asked by mfilion

5 years 10 months 2 days

0

votes

0

answers
1796 views
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