the ratio of the voltage phasor to the electric current phasor.

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Re: si-list Digest V16 #24


A few things to recognize, folksFirst, ANYONE can build an averaged model which is state space plane......

asked by Steve lastest answer by Steve

5 years 1 month 14 days

0

votes

3

answers
3602 views

Fwd: VRM bode plot transformation into output imp


---------- Forwarded message ----------From: Don Pakbaz Date: Wed, Jan 13, 2016 at 8:43 AMSubject: V......

asked by don.pakbaz

5 years 1 month 14 days

0

votes

0

answers
2594 views

VRM bode plot transformation into output imp prof......


Hi,This post is about theories on VRM modelling.For power integrity analysis ideally we should combi......

asked by buenoshun lastest answer by jun.zhou

5 years 1 month 15 days

0

votes

13

answers
4812 views

There are not 2, there are six ... How to specify......


Jeff,If your design is limited to simple through hole vias, then two hole sizes are required - finis......

asked by wkatz

5 years 1 month 21 days

0

votes

0

answers
2393 views

Generic vs. specific stackups for PCB designers


I have a question targeted at the design and signal integrity engineersâ??perspective, not PCB fabri......

asked by jeff.loyer lastest answer by buenoshun

5 years 2 months 27 days

0

votes

2

answers
4111 views

Creating S parameter model for simulation


Hello Experts,I would like to study the impact of different routing on mounted inductance for decoup......

asked by benoit.goral lastest answer by istvan.novak

5 years 2 months 21 days

0

votes

1

answers
2918 views

Impact of pad cap on return loss


Hello Experts,I am designing a package for a 12 Gbps Serdes.The package layout is showing a differen......

asked by amit.j.kumar lastest answer by al

5 years 3 months 1 day

0

votes

6

answers
3618 views

Wiring Harnessing SI Question


HI all --Hoping that list can shed some light on some wire harness related SIquestions at some very,......

asked by movax lastest answer by corley

5 years 3 months 3 days

0

votes

4

answers
3480 views

Free Transmission Line Calculator


Hi,I've recently returned to consluting work and have the opportunity torelease some tools I develop......

asked by tim lastest answer by michael.huang

5 years 3 months 8 days

0

votes

4

answers
3471 views

Characterizing PCB Impedance in Coplanar Structur......


Hi Folks,Hopefully this is an easy one for someone out there, but I need some insight. I'm using a 2......

asked by brian.p.moran lastest answer by leeritchey

5 years 3 months 23 days

0

votes

5

answers
2969 views

Testing DVI Cables


Can someone point me to a company that can test DVI cables?I need to perform a TDR test for the foll......

asked by charles lastest answer by al

5 years 3 months 23 days

0

votes

1

answers
2362 views

Controlled impedance substrate design


Hello All SI expertsi'm designing 2 layer chip substrate ( not board) that should havedifferential 1......

asked by qantrix

5 years 3 months 24 days

0

votes

0

answers
2315 views

differential signal driver\ receiver


Hello,The diffrerantial communication spec:The Lines: H,LVoltage levels: 0-5vLogic:True: H =5v ,L =0......

asked by shimonakrish

5 years 3 months 24 days

0

votes

0

answers
2437 views

PDN impedance measurements


Hi gurus,Please forgive my ignorance, but could someone enlighten me on what are the limitations of ......

asked by matusov lastest answer by corley

5 years 4 months 25 days

0

votes

7

answers
3490 views

[SI-LIST]: Output impedance of Open source Curren......


Hi All,I am trying to simulate HCSL open source current driver.IBIS file of the driver has falling a......

asked by ah.vinod lastest answer by Arpad_Muranyi

5 years 5 months 25 days

0

votes

1

answers
2616 views
5 years 5 months 6 days

0

votes

7

answers
2958 views

What does an unpowered FPGA output look like on a......


Hello SI-list!Trying to figure out if an unpowered, area array FPGA output is connected to PCB using......

asked by jnieznan lastest answer by tom

5 years 6 months 25 days

0

votes

3

answers
3198 views

Do SERDES interfaces need Power Aware SI channel ......


*Hi Team,*Could anybody let me know the importance of Power Aware simulation in todayHigh Speed appl......

asked by rameshp3note lastest answer by chris.cheng

5 years 6 months 26 days

0

votes

2

answers
2736 views

Varying the Reference Impedance of S21


I have a S21 based on 50 Ohm reference impedance. Does anyone know how to transform the S21 with ref......

asked by dmarc-noreply-outsider lastest answer by DBanas

5 years 6 months 28 days

0

votes

2

answers
2385 views
5 years 6 months 2 days

0

votes

9

answers
3679 views
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