HyperLynx is a signal integrity analysis tool in PCB systems design, developed by Mentor Graphics.

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Serpentine line self-crosstalk simulation in Hype......


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asked by aleilee2008 lastest answer by Charles.Grasso

4 years 8 months 28 days

0

votes

13

answers
5530 views

Reg :Altera Encrypted Hspice simulation


Dear all,We are using Altera Fpgs in our design.We are doing Signal integrity forthe design.Altera p......

asked by gkravi.1988 lastest answer by Arpad_Muranyi

5 years 2 months 18 days

0

votes

1

answers
2362 views

IBIS-AMI HSS15 model?


Experts,Iâ??ve gotten this question from a potential HyperLynx customer and waswondering if anyone c......

asked by cuong lastest answer by yu.yanfeng

5 years 4 months 9 days

0

votes

1

answers
2536 views

Hyperlynx far end crosstalk simulation issue


Sorry for the messy code. Have no idea what happened. Resent this email...Hi experts,It's known that......

asked by lmt8885 lastest answer by jeff.loyer

5 years 10 months 3 days

0

votes

7

answers
3668 views

Hyperlynx - Assigning Pins from ibis


I need some help with a particular IBIS model.When I try to assign a Pin, I get the following messag......

asked by hitheshn lastest answer by ken

6 years 2 months 25 days

0

votes

2

answers
1998 views

Antw: Hyperlynx


Hi Nico,At our company we use Bordsim (with Multiboard and XTALK option) andLinesim with coupling li......

asked by RNowak lastest answer by bill_hargin

17 years 11 months 4 days

0

votes

1

answers
2124 views

Hyperlynx vs Signal Explorer


We are considering adding a base-model (

asked by craig.domeny lastest answer by dlieby

14 years 25 days

0

votes

49

answers
1338 views

Hyperlynx tutorial


Hi,Any one have Hyperlynx tutorial book. Please share.Thanks and Regards,Sankar.K___________________......

asked by Sankar.Karuppannan lastest answer by chaozhang

11 years 8 months 8 days

0

votes

5

answers
1724 views

Query on Eye-Diagram of RX ADC


Hi Techies,I have a question on Eye-diagram. We are having an interface between ADC andVirtex-5 FPGA......

asked by chundis lastest answer by Gert.Havermann

11 years 2 months 13 days

0

votes

4

answers
1395 views

SI Simulations for SERDES signals


Hi All,I am doing SERDES channel simulations for Xilinx Virtex-5 SERDES channels.In our case our SER......

asked by chundis lastest answer by Gert.Havermann

10 years 3 months 2 days

0

votes

2

answers
1424 views

XAUI simulation -help needed


Hi,I am using Hyperlynx SI tool V 8.2.1. In XAUI simulation, AC coupling capacitor is kept near to r......

asked by kbmanick lastest answer by Gert.Havermann

7 years 11 months 6 days

0

votes

6

answers
1768 views

Transmitter Jitter Setup for simulations of 5Gbps......


Hello all,I have a question relating to the proper use of jitter in hi-speed simulations of several ......

asked by ihirshtal lastest answer by Gert.Havermann

7 years 7 months 12 days

0

votes

10

answers
3463 views

WG: Transmitter Jitter Setup for simulations of 5......


ResentVon: Havermann, GertGesendet: Dienstag, 25. Juni 2013 12:50An: 'Hirshtal Itzhak'; si-list@xxxx......

asked by Gert.Havermann lastest answer by Gert.Havermann

7 years 7 months 6 days

0

votes

3

answers
2222 views

Is it because of convergence of the simulation to......


Hi, I am using HyperLynx SI 8.2.1. When I simulate a particulartopology, I get a good result.......

asked by kbmanick lastest answer by Gert.Havermann

7 years 6 months 19 days

0

votes

1

answers
1940 views

sparameter to TDR


Hi ,Can any one please suggest how do I convert my sparameter data to TDRI have a sparameter file ge......

asked by roopesh.badala lastest answer by Gert.Havermann

6 years 10 months 22 days

0

votes

5

answers
2548 views

oscillations occurring in the middle of waveform


Hello All,While simulating SI in HyperLynx I observed following waveform in oscilloscope:[cid:image0......

asked by Nachiket.Wawoo lastest answer by Nachiket.Wawoo

6 years 9 months 5 days

0

votes

4

answers
2289 views

Design with DDR (SSTL-2) memory


Hello SI Gurus,I am doing my first design with an SSTL-2 DDR memory. I will be using asingle or max......

asked by ajmani

19 years 5 months 3 days

0

votes

0

answers
1710 views

576MHz board design... again


good morning,first i'd like to thank those who responded to my request for advice.i printed out the ......

asked by Robison_M

18 years 10 months 19 days

0

votes

0

answers
1295 views

simulation in SCRATCHPAD


Hi, I don't know appropriate this response is to your question , but I havewritten a scratch pad pro......

asked by epd2001usa

18 years 10 months 6 days

0

votes

0

answers
1025 views
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