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Generic vs. specific stackups for PCB designers


I have a question targeted at the design and signal integrity engineersâ??perspective, not PCB fabri......

asked by jeff.loyer lastest answer by buenoshun

4 years 11 months 25 days

0

votes

2

answers
3953 views

Copper plating


This is a question primarily for PCB board fabricators, or anyone who has specifically made accurate......

asked by dbrooks9 lastest answer by buenoshun

5 years 4 days

0

votes

2

answers
1885 views

tips of using TDR probe


Hi,We're evaluating the performance of our TDR probe to determine if it can be used in VNA measureme......

asked by sherman.chen lastest answer by han.guobing

5 years 10 months 15 days

0

votes

16

answers
2515 views

Free Workshop for Package/PCB Designers on ANSYS ......


Hi Everyone,ANSYS is hosting a free workshop for Package & PCB designers on ANSYS HFSS,at their Aust......

asked by margaret.schmitt

5 years 10 months 18 days

0

votes

0

answers
1997 views

Openings in Molex (Singapore)


GuysThere are couple of openings in Molex Singapore for Signal Integrity Engineers with Design and A......

asked by satishp

6 years 10 months 6 days

0

votes

0

answers
2267 views

Employment Opportunity with FormFactor Inc (Singa......


HI All,We have the following positions currently open in our Company, interested candidate Please em......

asked by vivekamp lastest answer by vivekamp

7 years 6 months 15 days

0

votes

1

answers
1992 views

Si Photonics Principal Engineer needed at Huawei ......


Principal Si Photonics Development EngineerThe individual will join our hybrid photonic integration ......

asked by Mark.Apton

7 years 9 months 21 days

0

votes

0

answers
1735 views

Front Range Signal Integrity Seminar Series, Marc......


Hi folks-You are all invited to the first of the Front Range Signal IntegritySeminars, scheduled for......

asked by eric

7 years 9 months 29 days

0

votes

0

answers
1579 views

DDR3 Clock non-monotonicity issue


Hi Experts,I am doing simulation and measurement for DDR3 interface operating at1866MT/s in one of o......

asked by bala89si lastest answer by weirsi

7 years 9 months 2 days

0

votes

4

answers
1782 views

AW: Stackup for insertion loss control ownership-......


Scott,well put. I think being skeptical is key for good engineering and to assure future improvement......

asked by Gert.Havermann

7 years 10 months 1 day

0

votes

0

answers
1764 views

Copper roughness control/communication


Hi, I was wondering how you guys communicate copper roughness control with different PCB fabs. Do yo......

asked by buenos lastest answer by weirsi

8 years 25 days

0

votes

3

answers
1862 views

Looking for additional Beta Testers for Allegro &......


Hi again, Folks ?We?re getting ready to start another round of testing on interfaces betweenour Stac......

asked by b.hargin

8 years 26 days

0

votes

0

answers
1824 views

WG: Re:AW: Re: PCB Insertion loss prediction


ResentVon: Havermann, GertGesendet: Mittwoch, 7. November 2012 10:10An: si-list@xxxxxxxxxxxxxBetreff......

asked by Gert.Havermann lastest answer by buenos

8 years 4 days

0

votes

7

answers
1982 views

Beta Testing new Allegro & HyperLynx interfaces


Hi Folks ?We?re getting ready to start user testing on interfaces between our StackupPlanner softwar......

asked by b.hargin

8 years 1 month 13 days

0

votes

0

answers
1798 views

PCB Signal-Layer Selection Webinar


Hi All:For those who are interested - or can?t think of what to do with theremaining days of summer ......

asked by b.hargin

8 years 3 months 22 days

0

votes

0

answers
1843 views

1000Base-T Transmitter Distortion Testing


Hello All,I am working on IEEE 802.3 testing for a system with two Intelgigabit Ethernet controllers......

asked by mfornero lastest answer by mfornero

8 years 4 months 10 days

0

votes

1

answers
2790 views

PCB material selection and stackup optimization


Hi All:Starting this Wednesday, we?re hosting a ?PCB Stackup Technology? Webinarseries that focuses ......

asked by b.hargin lastest answer by b.hargin

8 years 4 months 5 days

0

votes

1

answers
1668 views

Sr SI engineer job opening at Intel


We have a senior Signal Integrity Engineer position open @ the Santa Clara, CA campus. Please send ......

asked by samuel.e.ma lastest answer by mediwheel_js

8 years 5 months 26 days

0

votes

1

answers
1846 views

Re: PCB Stackup Design Class at Costa Mesa April ......


There are still a few seats available in the all day class that covers all aspects of creating a com......

asked by leeritchey

8 years 8 months 18 days

0

votes

0

answers
1669 views

Re: PCB Stackup Design Class With Latest Low Loss......


We at Speeding Edge are holding our upcoming public PCB Stackup design course with the latest in low......

asked by leeritchey

8 years 9 months 8 days

0

votes

0

answers
1651 views
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