Gen 2 of double data rate synchronous dynamic random-access memory interface.

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Looking for Hyperlynx - Signal Integrity Experts


Thanks to all those that responded to our job offer. We did hire someone, so thanks, but we still ne......

asked by charles

7 years 8 months 15 days

0

votes

0

answers
1692 views

Looking for Signal integrity engineers in the Los......


AEi Systems is looking for Signal integrity engineers/analysts in the Los Angeles area. We are not a......

asked by charles lastest answer by charles

7 years 8 months 4 days

0

votes

2

answers
1407 views

DDR2 setup and hold time calculations


Hi, This is regarding DDR2 setup and hold time calculations.delta tIS and delta tIH derating values......

asked by kbmanick lastest answer by emcesd

7 years 9 months 12 days

0

votes

2

answers
1004 views

DDR2 de-rated -setup


Hi,By simulation, I obtained the DDR2 clock waveform.When I measure the input clock slew rate (diffe......

asked by kbmanick lastest answer by sreekanths18

7 years 9 months 28 days

0

votes

1

answers
967 views

DDR2/3 and tQH/tQHS


We've been having some internal discussions on DDR tQH/tQHS that I'm hoping some (memory) experts ca......

asked by conrad.herse

7 years 10 months 16 days

0

votes

0

answers
1888 views
7 years 10 months 3 days

0

votes

9

answers
2242 views

DDR 4 Features


Hello,as we have just touched DDR4 ..Some time ago I made a short overview DDR2 vs. DDR3. I did an u......

asked by Hermann.Ruckerbauer

8 years 1 month 3 days

0

votes

0

answers
1852 views

DDR2 eye-diagram masks creation


Dear Experts,I am doing some verification of LPDDR2 memories and my question is about creating eye-d......

asked by ddankomm lastest answer by weirsi

8 years 1 month 3 days

0

votes

7

answers
1323 views

SI Lab Lead at Xilinx


My team is looking for a senior SI Lab Lead to drive our SI lab activities. Please contact me at yon......

asked by yong.wang

8 years 2 months 16 days

0

votes

0

answers
1901 views

Check LPDDR2 CK-DQS timing


Hi, I'm going through LPDDR2 spec for CK-DQS timing definition on DRAM side. The spec has define......

asked by zlqin80 lastest answer by Hermann.Ruckerbauer

8 years 2 months 24 days

0

votes

3

answers
2736 views

Daisy chain topology for DDR2 addressing signals?


Hi all,For 72 -bit DDR2 interface, we are using 5 DDR2 devices each having 16-bitdata width .All fiv......

asked by venkatarao.S lastest answer by fbhatti

8 years 2 months 24 days

0

votes

5

answers
1134 views

10 Layer Stackup Recommendation for Board with Hi......


Hi All,I am looking for suggestions for our PCB which has high speed interfaces like SERDES /DDR2/GI......

asked by prashanth_rajappan lastest answer by weirsi

8 years 3 months 5 days

0

votes

11

answers
2468 views

Sr. Signal Integrity Electrical Engineer


This position is located in Colorado. Enjoy the challenge of developingleading edge storage, server......

asked by bretadair lastest answer by bretadair

8 years 6 months 8 days

0

votes

1

answers
1895 views

DDR2 termination Questions


Some questions about DDR2 termination -Let's say it's a Read operation from Memory to FPGADDR2 ---> ......

asked by hitheshn lastest answer by liu.yaoping

8 years 7 months 17 days

0

votes

8

answers
1601 views

Infinite subckt recursion error in Sisoft


Hi All,I am trying to simulate one of the nets (dq_2R) in the Sisoft ddr2design kits.But I get "infi......

asked by hithesh

8 years 7 months 26 days

0

votes

0

answers
1272 views

Design of Experiments


Hi,I've been using Design of Experiments methodology for a while now to analyzeinterfaces that can h......

asked by tim.coyle

8 years 9 months 2 days

0

votes

0

answers
1205 views

Re: : DDR2 Analysis


Dear Experts, I have a query on DDR2 analysis. Kindly help to clarify it.I am using MT47H64M16HR-3IT......

asked by bennyluiss lastest answer by Patrick_Carrier

8 years 9 months 5 days

0

votes

6

answers
901 views

DDR2 length matching


hi, This question is regarding the DDR2 interlace. In general, due to heavy loading......

asked by kbmanick lastest answer by dudi

8 years 9 months 7 days

0

votes

2

answers
748 views

Sr. SI Engineer (Backplane Architect) needed at H......


My Team is looking for a Senior Staff Engineer(BackplaneArchitect)/Principle Engineer;Responsibiliti......

asked by mapton lastest answer by Mark.Apton

8 years 10 months 15 days

0

votes

4

answers
2031 views

US Job Opportunity - Senior Application Engineer


Hello,Mentor Graphics currently has an opportunity for a Senior Application Engineer in the Orlando,......

asked by Mark_Deley

8 years 10 months 26 days

0

votes

0

answers
1673 views
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