Transmitter Jitter Setup for simulations of 5Gbps SERDES

Hello all,I have a question relating to the proper use of jitter in hi-speed simulations of several Gbps pairs.I've been using HyperLynx IBIS-AMI Channel Analysis tool in order to simulate 5Gbps channels going from one PCB to another one through a motherboard.I use IBIS-AMI models from the Tx/Rx vendors and S-Parameter models for the connectors involved.The main problem for me is understanding how to use the jitter specification for the transmitter.The transmitter data sheet defines miscellaneous Near-End (Tx) Template Intervals, part of which are jitter intervals, which include T_UBHPJ (Uncorrelated Bounded High Probability Jitter) of 0.15UIptp, T_DCD (Duty-Cycle Distortion) of 0.05UIptp and T_TJ (Total Jitter) of 0.30UIptp.I have been using these parameters as follows inside the simulation tool setup:-          Dual Dirac Jitter: 1st  mean = -0.1UI, 2nd mean = +0.1UI (accounting approximately for the sum of the 1st 2 jitter parameters, which equals 0.2UI)-          Sigma of Random Jitter = 0.01UI, which results from subtracting the1st 2 parameters from the total jitter (yielding 0.1UI) and dividing the result by 14 (the ratio [for BER of 10**(-12)] between peak-to-peak jitter and Sigma. I rounded the final result up a little to get 0.01UI.So, to conclude: Have I used the simulation tool's jitter setup correctly to account for the Tx jitter definitions? Because when I do that, I get a closed eye (relative to the Rx eye-mask spec). Without these jitter elements the eye is completely open!Also, what BER ratio should I use for the Sigma definition? Should it be according to the desired BER on the receiver?Thanks for your helpItzhak HirshtalEltaThe information contained in this communication is proprietary to Israel Aerospace Industries Ltd. and/or third parties, may contain confidential or privileged information, and is intended only for the use of the intended addresse thereof. If you are not the intended addressee, please be aware that any use, disclosure, distribution and/or copying of this communication is strictly prohibited. If you receive this communication in error, please notify the sender immediately and delete it from your computer.Thank you.
ihirshtal 7 years 7 months 12 days

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Answered byihirshtal 7 years 7 months 5 days
Thanks, ToddThat's exactly what I don't understand. Maybe it's time for me to delve into the sRIO spec, I just thought someone would have a quick answer for me.ThanksItzhak Hirshtal-----
Answered byconrad.herse 7 years 7 months 5 days
Hi Hirshtal,I've always interpreted Tx jitter as the amount of jitter the transmitter itself introduces, independent of any other jitter sources. I consider it the amount of jitter the transmitter would generate into a test load, i.e. before even connecting it to a real channel. Channel jitter would be additional jitter added on top of the transmitter jitter. I've always allocated the full Tx jitter in my simulations to just the transmitter, any additional jitter from the channel (and receiver) are in addition to the Tx jitter.Conrad HerseAlcatel-LucentOn 6/26/2013 3:06 AM, Hirshtal Itzhak wrote:> Hi Conrad,> The question is: disregarding the specific simulator details, and assuming > the jitter values are not included in the IBIS-AMI model (as indeed is the > case with the model I received from the vendor)) should I setup the > transmitter generated jitter (using simulator facilities) to the sRIO jitter > numbers, even if the resultant jitter present on the transmitter pins is > greater (because of channel imperfections etc.)?>> In other words, do these parameters represent the (worst-case, maximum > allowed) "internal" chip mechanisms of jitter generation as would appear on > its pins if it was loaded with a perfect termination (Actually disregarding > the "outside world" on the real channel), in which case I should consider it > as worst-case Tx jitter that I have (or rather my channel design has) to deal > with?>> Thanks> Itzhak (Hirshtal)>> -----
Answered byihirshtal 7 years 7 months 5 days
Hi Conrad,The question is: disregarding the specific simulator details, and assuming the jitter values are not included in the IBIS-AMI model (as indeed is the case with the model I received from the vendor)) should I setup the transmitter generated jitter (using simulator facilities) to the sRIO jitter numbers, even if the resultant jitter present on the transmitter pins is greater (because of channel imperfections etc.)?In other words, do these parameters represent the (worst-case, maximum allowed) "internal" chip mechanisms of jitter generation as would appear on its pins if it was loaded with a perfect termination (Actually disregarding the "outside world" on the real channel), in which case I should consider it as worst-case Tx jitter that I have (or rather my channel design has) to deal with?ThanksItzhak (Hirshtal)-----
Answered bytwesterh 7 years 7 months 5 days
Itzhak,Jitter placed on the transmitter in an IBIS-AMI simulation directly modulates the device's output. In other words, if you specify 10ps of P-P jitter on the TX, that is what you should see at the TX die pad.I don't remember the details of how jitter is spec'd for sRIO, so I can't comment there ... but if the jitter is spec'd at a measurement point in the channel, it stands to reason that the jitter budget for the model would be somewhat less than what you see at the test point, so that by the time channel ISI is included, you see the behavior measure for compliance.Todd.-- Todd WesterhoffVP, Software ProductsSiSoft6 Clock Tower Place, Suite 250Maynard, MA 01754(978) 461-0449 x24twesterh@xxxxxxxxxxwww.sisoft.com“I want to live like that"                                             -Sidewalk ProphetsOn Jun 26, 2013, at 4:08 AM, Hirshtal Itzhak  wrote:> Hi Conrad,> The question is: disregarding the specific simulator details, and assuming > the jitter values are not included in the IBIS-AMI model (as indeed is the > case with the model I received from the vendor)) should I setup the > transmitter generated jitter (using simulator facilities) to the sRIO jitter > numbers, even if the resultant jitter present on the transmitter pins is > greater (because of channel imperfections etc.)?> > In other words, do these parameters represent the (worst-case, maximum > allowed) "internal" chip mechanisms of jitter generation as would appear on > its pins if it was loaded with a perfect termination (Actually disregarding > the "outside world" on the real channel), in which case I should consider it > as worst-case Tx jitter that I have (or rather my channel design has) to deal > with?> > Thanks> Itzhak (Hirshtal)> > -----
Answered byihirshtal 7 years 7 months 6 days
That's OK, but the question remains - what does the sRIO specification really means???-----
Answered byGert.Havermann 7 years 7 months 6 days
Hi Itzhak,what I meant is that the channel creates ISI, and the chip creates ISI, but the chip can not include the Channel ISI.The total Jitter of the transmitter can't include channel ISI.The overall Channel Jitter will include ISI of the Chip and the Channel.BRGertVon: Hirshtal Itzhak [mailto:ihirshtal@xxxxxxxxxx]Gesendet: Dienstag, 25. Juni 2013 14:06An: Havermann, Gert; si-list@xxxxxxxxxxxxxBetreff: RE: Transmitter Jitter Setup for simulations of 5Gbps SERDESHi gert,You state that they are both not absolutely correct, but your explanation after that doesn't seem compatible with your statement. The ISI within the chip and package isn't part of the channel ISI!RegardsItzhak
Answered byihirshtal 7 years 7 months 6 days
Hi gert,You state that they are both not absolutely correct, but your explanation after that doesn't seem compatible with your statement. The ISI within the chip and package isn't part of the channel ISI!RegardsItzhak-----
Answered byGert.Havermann 7 years 7 months 6 days
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Answered byihirshtal 7 years 7 months 6 days
Hi again,Let me try to focus on a certain aspect of my problem:The sRIO Level II spec details the Tx Jitter values as follows:Eye Mask = 125mVUncorrelated Bounded High Probability Jitter = 0.15UI ptpDuty Cycle Distortion = 0.05UI ptpTotal Jitter = 0.30UI ptpThe question is: what do these parameters mean?My understanding: The Transmitter device maximum allowed DCD & jitter.What the device vendor seems to tell me: The maximum actual DCD & jitter present on the Transmitter pins due to both internal jitter generation and channel ISI.So my 1st question is - which is correct?Then, if the 1st interpretation is true, it seems I need to somehow enter all of the above detailed parameters to my simulation transmitter model, shouldn't I?On the other hand, if the 2nd interpretation is true, then it seems I have to ask the device vendor to tell me what's the actual jitter generated by the device itself, shouldn't I?Thanks for your help on this matter!Itzhak Hirshtal-----
Answered byconrad.herse 7 years 7 months 6 days
Hi Hirshtal,I think the sRIO parameters mean exactly what they state. An sRIO compliant transmitter will not exceed (using your numbers here):0.30 UI of total jitter0.05 UI of DCD0.15 UI of UBHP jitterThere are other jitter components such as Rj and DDJ which combine with the listed DCD and UBHP jitter components, but the total should never exceed the 0.30 UI of total jitter (at the sRIO specified BER, can't remember if this is 1e-12 or 1e-15 off the top of my head), and the listed individual jitter components should never exceed their stated values for an sRIO compliant transmitter.Trying to enter these different jitter components into a simulator for stimulation of your channel is simulator dependent, they may need to be grouped together and "shoe horned" into categories based on what's available in your simulator of choice.Conrad HerseAlcatel-LucentOn 6/25/2013 7:16 AM, Hirshtal Itzhak wrote:> That's OK, but the question remains - what does the sRIO specification really > means???> -----
Answered byGert.Havermann 7 years 7 months 12 days
Hi Itzhak,Quite honestly I don't know hyperlinx in that detail. You should ask the support or maybe some helpfiles to find out which type of Jitter has to be used.You could try to add one jitter component at a time and measure the jitter in the simulation result to check if the input Jitter equals the output Jitter. This way you can find out which parameter to change in which way.BRGert
Answered byihirshtal 7 years 7 months 12 days
Hi Gert,I did exactly that!!The question was: Am I correct in doing so?And what about the non-random jitter? Did I set it up correctly?Also, I've heard an opinion saying I shouldn't set these jitter values at all, but take instead the jitter specification of the Transmitter Reference Clock! Is that true?RegardsItzhak-----
Answered byGert.Havermann 7 years 7 months 12 days
The Jitter Values can be given in either "RMS" or "Peak to Peak". Check what kind of input the simulator engine needs, and if it agrees to the datasheet numbers you punched in. If simulator uses RMS and Datasheet gives P2P, then you need to convert the jitter values using a BER based conversion table.BRGert