Remove ground plane under connector pads?

Hi,Is it standard practice to remove copper from the ground plane under high-speed connector SMT pads?I'm designing a board with 100-ohm differential pairs carrying 5.4 Gbps data terminating at a Samtec ERM8 connector.  For my stack-up, the differential traces are 0.11 mm wide and 0.17 mm apart.  The connector pads are 0.5 mm by 2.0 mm.  Should I remove an equal area of copper from the ground plane directly under each pad?Thanks,Andrew.
andrew 5 years 9 months 18 days

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Answered byemcesd 5 years 9 months 15 days
Hi LeeLot of presentation and simulation prove this is a useful tech for most of high speed application.Regards.TeslaAt 2014-12-09 01:57:28, "Scott McMorrow"  wrote:>It depends on the stackup thickness between L1 and Ground.>>Scott McMorrow>Teraspeed® Consulting - A Division of Samtec>16 Stormy Brook Rd>Falmouth, ME 04105>(401) 284-1827 Business>http://www.teraspeed.com>>On Mon, Dec 8, 2014 at 12:41 PM, Lee  wrote:>>> From tests we have made, removing ground from underneath the mounting pads>> of capacitors is not worth doing.>>>> -----
Answered byLeon.Wu 5 years 9 months 16 days
Agreed with Scott.Hi Andrew,I cut the gnd plane underneath the pad based on the difference between pad width and trace width.If the pad width is much larger than the trace width, than you might need to cut the gnd plane to increase the impedance caused by the pads.For further detail, you can contact to our "SignalIntegrityGroup@xxxxxxxxxx".Thanks and regards,Leon-----
Answered bydmarc-noreply 5 years 9 months 16 days
Helllo Lee,These are edge connectors which can be tricky, I have recently worked on a PCIe Gen3 design which when connector launch was designed correctly we gained 18ps of jitter.  Return reference plane was optimized for the edge fingers and was not in our case directly on the layer below the edge fingers.Regards,-Jory Jory McKinleyMcKinley Consultinge-mail: jory_mckinley@xxxxxxxxxphone: (774)-285-2859      From: Lee  To: scott@xxxxxxxxxxxxx; jonathan.lloyd.riley@xxxxxxxxx Cc: si-list@xxxxxxxxxxxxx; Jim Nadolny ; michael.p.brownell@xxxxxxxxx; andrew@xxxxxxxxxxxxxxxxxx  Sent: Monday, December 8, 2014 12:41 PM Subject: [SI-LIST] Re: Remove ground plane under connector pads?From tests we have made, removing ground from underneath the mounting pads of capacitors is not worth doing.-----
Answered byscott 5 years 9 months 16 days
It depends on the stackup thickness between L1 and Ground.Scott McMorrowTeraspeed® Consulting - A Division of Samtec16 Stormy Brook RdFalmouth, ME 04105(401) 284-1827 Businesshttp://www.teraspeed.comOn Mon, Dec 8, 2014 at 12:41 PM, Lee  wrote:> From tests we have made, removing ground from underneath the mounting pads> of capacitors is not worth doing.>> -----
Answered byleeritchey 5 years 9 months 16 days
From tests we have made, removing ground from underneath the mounting pads of capacitors is not worth doing.-----
Answered byjonathan.lloyd.riley 5 years 9 months 18 days
Hi AndrewOne problem with connector pads is that they're frequently rather widerthan the traces that you're using. This results in a lowering of theimpedance at that point. To maintain a constant impedance for adifferential signal you can change both the trace width and the separation,but even so, there are limits and going from a 0.11mm trace to a 0.5mmtrace (the pad width) is too much for just increasing the separation.Instead the approach is to increase the distance of the signal from thereference plane. We can't make the PCB thicker, but it is possible to cutaway the copper underneath the pads, thus increasing the distance from theconnector pad to the plane and so raising the impedance. How useful thetechnique is will also depend on how close the next layer down happens tobe and just how big the apertures are that you're going to make. Also theamount of perforations in the reference plane will affect the assumptionsmade when the advice to do this was given and too many holes too closetogether will sooner or later make those assumptions break down. At thatpoint the advice becomes counter productive. The impedance where the holesare is higher, but not exactly uncontrolled, rather it is now dependent onmore factors. The key thing is that you've moved it in the right direction.It remains a fairly crude approximation though.There are a number of manufacturers that recommend this practice in theirapplication notes for things like PCIe and other differential serialinterfaces. Some also require this for the AC coupling capacitors that areoften a feature of differential links.If the manufacturer tells you to do this, it is best to follow theirinstructions since if there are problems you can say that you followedtheir instructions correctly.Perhaps others in the group might have data on the actual differencebetween a board with apertures and the same one without them. People with3D solvers will be able to model this and know what the impedance doeswhere the apertures are.RegardsJonOn 6 December 2014 at 19:23, Brownell, Michael P  wrote:> Have you checked with Jim Nadolny at Samtec?> Regards,>> Mike>>> -----
Answered byscott 5 years 9 months 18 days
The answer is. It depends. The ultimate solution is to promise with a 3D EMtool like HFSS. But a good first approximation for most commercial boardswith thin dielectrics with plane on layer 2 is to create an antipad onlayer 2 that is ate same size as the pad. It will not be optimal, but itwill help.ScottOn Dec 6, 2014 6:49 PM, "Jonathan Riley" wrote:> Hi Andrew> One problem with connector pads is that they're frequently rather wider> than the traces that you're using. This results in a lowering of the> impedance at that point. To maintain a constant impedance for a> differential signal you can change both the trace width and the separation,> but even so, there are limits and going from a 0.11mm trace to a 0.5mm> trace (the pad width) is too much for just increasing the separation.>> Instead the approach is to increase the distance of the signal from the> reference plane. We can't make the PCB thicker, but it is possible to cut> away the copper underneath the pads, thus increasing the distance from the> connector pad to the plane and so raising the impedance. How useful the> technique is will also depend on how close the next layer down happens to> be and just how big the apertures are that you're going to make. Also the> amount of perforations in the reference plane will affect the assumptions> made when the advice to do this was given and too many holes too close> together will sooner or later make those assumptions break down. At that> point the advice becomes counter productive. The impedance where the holes> are is higher, but not exactly uncontrolled, rather it is now dependent on> more factors. The key thing is that you've moved it in the right direction.> It remains a fairly crude approximation though.>> There are a number of manufacturers that recommend this practice in their> application notes for things like PCIe and other differential serial> interfaces. Some also require this for the AC coupling capacitors that are> often a feature of differential links.>> If the manufacturer tells you to do this, it is best to follow their> instructions since if there are problems you can say that you followed> their instructions correctly.>> Perhaps others in the group might have data on the actual difference> between a board with apertures and the same one without them. People with> 3D solvers will be able to model this and know what the impedance does> where the apertures are.>> Regards> Jon>> On 6 December 2014 at 19:23, Brownell, Michael P <> michael.p.brownell@xxxxxxxxx> wrote:>> > Have you checked with Jim Nadolny at Samtec?> > Regards,> >> > Mike> >> >> > -----
Answered bymichael.p.brownell 5 years 9 months 18 days
Have you checked with Jim Nadolny at Samtec?Regards,Mike-----
Answered bydmarc-noreply 5 years 9 months 18 days
Hello Andrew,Removing metal under the SMT pads without regard to return currents will create a local uncontrolled impedance which will most likely affect your channel margins through launch discontinuities, potential unwanted coupling and mode conversion.  These affects may or may not be problematic depending on your overall channel.  If you able design your SMT launch to include a return reference which will in most cases be somewhere lower (higher) in the board stack-up.  Need to do this analysis with a 3D tool.Regards,-Jory Jory McKinleyMcKinley Consultinge-mail: jory_mckinley@xxxxxxxxxphone: (774)-285-2859      From: Andrew Holme  To: si-list@xxxxxxxxxxxxx  Sent: Saturday, December 6, 2014 9:28 AM Subject: [SI-LIST] Remove ground plane under connector pads?Hi,Is it standard practice to remove copper from the ground plane under high-speed connector SMT pads?I'm designing a board with 100-ohm differential pairs carrying 5.4 Gbps data terminating at a Samtec ERM8 connector.  For my stack-up, the differential traces are 0.11 mm wide and 0.17 mm apart.  The connector pads are 0.5 mm by 2.0 mm.  Should I remove an equal area of copper from the ground plane directly under each pad?Thanks,Andrew.